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Cooper

by admin last modified 2007-12-14 14:12

Keith Cooper

Professor and Chair, Computer Science

Rice University

VGrADS Activities: Co-PI, working on Programming Tools (Dynamic Optimization)

keith@rice.edu
http://www.cs.rice.edu/~keith/
Keith Cooper

Professional Preparation

  • Ph.D., Mathematical Sciences, Rice University, 1983
  • M.A., Mathematical Sciences, Rice University, 1982
  • B.S., Electrical Engineering, Rice University, 1978

Appointments

  • Chair Department of Computer Science, Rice July 2002 to present
  • Professor Department of Computer Science, Rice July 2000 to present
  • Associate Professor Department of Computer Science, Rice July 1990 to July 2000
  • Research Scientist Department of Computer Science, Rice July 1984 to June 1990
  • Research Scientist Department of Mathematical Sciences, Rice May 1983 to June 1984

Synergistic Activities

Dr. Cooper’s research group develops new compiler techniques and transfers them to both industry and academia. Methods developed in the group appear in compilers from BOPS, Compaq, Ericsson, Hewlett- Packard, IBM, Intel, Silicon Graphics, Sun Microsystems, and Texas Instruments. Most of his Ph.D.s accept positions in industry; he has placed students at Cray ( head of the compiler group), Sun (head of the Hotspot compiler group), Motorola, TI, Hewlett-Packard, LSI Logic, Dell, and BOPS (manager of compiler development). The research compiler tools developed in the group have been used in both industry and academia, including CalTech, Clemson, DEC (now Compaq), Harvard, Michigan Technological University, Sequent Computer, University of Delaware, and University of Massachusetts.

The second major focus of Dr. Cooper’s group has been to improve the exchange of information between the compiler construction community and other groups—bringing outsiders into the community and applying code optimization methods in new domains. With Linda Torczon, he has written a textbook on introductory compiler construction; it has been tested at more than 20 universities around the world and was published by Morgan Kaufmann late in 2002. With Devika Subramanian and Linda Torczon, he has worked to apply techniques from artificial intelligence to scheduling and allocation. With John Bennett and Linda Torczon, he worked on ways to apply classic compiler optimizations to Vhdl-based circuits.

Dr. Cooper has been involved in outreach to K–12 teachers and schools. He is a PI (with R. Tapia and C. Lanius) on a project called CS-CAMP that aims to build cadres of female high-school students interested in technology. He has lectured in Richard Tapia’s GirlTech/MCSA program—a summer institute that trains master teachers in technology while sensitizing them to the unique issues that arise in educating and retaining women and minorities. He has served on the technology committees of the Rice School/La Escuela Rice (a Houston ISD School) and Annunciation Orthodox School (in Houston). He has consulted with several Houston-area middle schools and high schools on their computing plants and their technology curriculums.

Dr. Cooper has been active in his professional community. He served as Program Chair for the Acm Sigplan 98 PLDI Conference and as Tutorials Chair for the same conference in 1993. He was a member of the Technical Steering Committee for the NSF-funded Center for Research on Parallel Computation from 1991 to 2000. He served on the Policy Board of the Concurrent Supercomputing Consortium from 1991 to 1996. He has served on review panels for the NSF/ITR program. He is on the Advisory Board of Rice’s Center for Computational Finance and Economic Systems.

Dr. Cooper was on the design team for Duncan Hall—the new Computational Engineering Building at Rice University. It houses four departments, several research centers, and a research institute. The building was designed to encourage collaboration—both within disciplines and across disciplines. It has become the hub of activity in the School of Engineering and the space used for most of the University’s programs that reach out to minorities, to women, and to educators from elementary and secondary schools.

VGrADS and Other Significant Publications

  • Berman, F, Casanova, H, Chien, A, Cooper, K, Dail, H, Dasgupta, A, Deng, W, Dongarra, J, Johnsson, L, Kennedy, K, Koelbel, C, Liu, B, Liu, X, Mandal, A, Marin, G, Mazina, M, Mellor-Crummey, J, Mendes, C, Olugbile, A, Patel, M, Reed, D, Shi, Z, Sievert, O, Xia, H, and YarKhan, A. “New Grid Scheduling and Rescheduling Methods in the GrADS Project,” International Journal of Parallel Programming (IJPP). (To appear 2005).
  • K.D. Cooper and Linda Torczon, Engineering a Compiler, Morgan-Kaufmann Publishers, 2003. (Textbook for an undergraduate compiler course)
  • K.D. Cooper, A. Das Gupta, and K. Kennedy, “Vizer: A System to Vectorize x86 Binaries,” Proceedings of the 2002 LACSI Symposium, Los Alamos Computer Science Institute, Santa Fe, NM, USA, October 2002.
  • K.D. Cooper and L. Xu, “An Efficient Static Analysis Algorithm to Detect Redundant Memory Operations,” ACM Workshop on Memory Systems Performance, Berlin, Germany, June 2002.
  • Z. Budimlic, K.D. Cooper, T.J. Harvey, K. Kennedy, S. Reeves, and T. Oberg “Copy Coalescing and Live-range Identification without an Interference Graph,” Proceedings of the SIGPLAN 2002 Conference on Programming Language Design and Implementation (Pldi), June 2002, pp. 25–32.
  • K.D. Cooper, D. Subramanian, and L. Torczon, “Adaptive Optimizing Compilers for the 21st Century,” Proceedings of the 2001 LACSI Symposium, Los Alamos Computer Science Institute, Santa Fe, NM, USA, October 2001 (also, Journal of Supercomputing, 23(1), August 2002, pp. 7–22.)
  • F. Berman, A. Chien, K.D. Cooper, J. Dongarra, I. Foster, D. Gannon, L. Johnsson, K. Kennedy, C. Kesselman, J. Mellor-Crummey, D. Reed, L. Torczon, and R. Wolski, “The GrADS Project: Software Support for High-Level Grid Application Development,” International Journal of Supercomputer Applications, 15(4), Winter 2001, pp. 327–344.
  • K.D. Cooper, K. Kennedy, and L. Torczon, “Compilers,” in Encyclopedia of Physical Science and Technology, 3rd Edition, R.A. Meyers, editor, Academic Press, 2001.
  • K.D. Cooper, L.T. Simpson, and C. Vick, “Operator Strength Reduction,” ACM Transactions on Programming Languages and Systems (TOPLAS), 23(5), September 2001, pp. 603–625.
  • P. Briggs, K.D. Cooper, and L. Torczon, “Coloring Heuristics for Register Allocation,” Proceedings of the ACM SIGPLAN 89 Conference on Programming Language Design and Implementation, June 1989, pp. 275–284. (Reprinted in the special issue of SIGPLAN Notices, 20 Years of PLDI (1979–1999): A Selection)
  • K.D. Cooper and K. Kennedy, “Interprocedural Side-effect Analysis in Linear Time”, Proceedings of the ACM SIGPLAN 88 Conference on Programming Language Design and Implementation, July 1988, pp. 57–66. (Reprinted in the special issue of SIGPLAN Notices, 20 Years of PLDI (1979–1999): A Selection)


VGrADS Collaborators include:

Rice University UCSD UH UCSB UTK ISI UTK

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